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north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 ath22t05 series ?5-v input 22-a, 5-v i nput non-isolated wide-output adjust power module standard application features ? up to 22 a output current ? 5-v input voltage ? wide-output voltage adjust (0.8 v to 3.6 v) ? efficienc ies up to 96 % ? 155 w/in3 power density ? on/off inhibit ? output voltage sense ? pre-bias startup ? margin up/down controls r set = resistor to set the desired output voltage (see spec. table for values). c in = required electrolytic 1,000 f c out = optional 330 f electrolytic ? auto-track? sequencing ? under-voltage lockout ? output over-current protection (non-latching, auto-reset) ? over-temperature protection ? surface mountable ? operating temp: C40 to +85 c ? dsp compatible output voltages ? ipc lead free 2 ? point-of-load alliance (pola) compatible margin up margin down v in l o a d c in 1,000 f (required) + c out 330 f (optional) + inhibit gnd gnd v out v o sense track r set (required) 0.1 w, 1 % pth05020w (top view) 1 2 10 9 8 7 6 5 4 3 auto-track? sequencing pin configuration pin function 1 gnd 2v in 3 inhibit * 4v o adjust 5v o sense 6v out 7 gnd 8 track 9 margin down * 10 margin up * * denotes negative logic: open = normal operation ground = function active description the ath22t05 series of non-isolated power modules offers oem designers a combination of high performance, small footprint, and industry leading features. as part of a new class of power modules these products provide designers with the flexibility to power the most complex multi-processor digital systems using off-the-shelf catalog parts. the series employs double-sided surface mount construction and provides high- performance step-down power conversion for up to 22 a of output current from a 5-v input bus voltage. the output volt- age of the ath22t05 can be set to any value over the range, 0.8 v to 3.6 v, using a single resistor. this series includes auto-track?. auto-track simplifies the task of supply voltage sequencing in a power system by enabling modules to track each other, or any external voltage, during power up and power down. other operating features include an on/off inhibit, output voltage adjust (trim), and margin up/down controls. to ensure tight load regulation, an output voltage sense is also provided. a non-latching over-current trip and over-temperature shutdown provides load fault protection. target applications include complex multi-voltage, multi-processor systems that incorporate the industrys high-speed dsps, micro-processors and bus drivers. nominal size = 1.5 in x 0.87 in (38,1 mm x 22,1 mm) ath22t05-9s revision 00 (3dec2003)
north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 pin descriptions vin: the positive input voltage power node to the mod- ule, which is referenced to common gnd . vout: the regulated positive power output with respect to the gnd node. gnd: this is the common ground connection for the vin and vout power connections. it is also the 0 vdc reference for the control inputs. inhibit: the inhibit pin is an open-collector/drain negative logic input that is referenced to gnd . applying a low- level ground signal to this input disables the modules output and turns off the output voltage. when the inhibit control is active, the input current drawn by the regula- tor is significantly reduced. if the inhibit pin is left open-circuit, the module will produce an output when- ever a valid input source is applied. vo adjust: a 0.1 w, 1 % tolerance (or better) resistor must be connected directly between this pin and pin 7 ( gnd) to set the output voltage to the desired value. the set point range for the output voltage is from 0.8 v to 3.6 v. the resistor required for a given output voltage may be calculated from the following formula. if left open circuit, the module output will default to its lowest output voltage value. for further information on output voltage adjustment consult the related application note. r set = 10 k 0.8 v C 2.49 k v out C 0.8 v the specification table gives the preferred resistor values for a number of standard output voltages. vo sense: the sense input allows the regulation circuit to compensate for voltage drop between the module and the load. for optimal voltage accuracy vo sense should be connected to vout . it can also be left disconnected. track: this is an analog control input that enables the output voltage to follow an external voltage. this pin becomes active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from 0 v up to the nominal set-point voltage. within this range the output will follow the voltage at the track pin on a volt-for-volt basis. when the control voltage is raised above this range, the module regulates at its set-point voltage. the feature allows the output voltage to rise simultaneously with other modules pow- ered from the same input bus. if unused, the input may be left unconnected. note: due to the under-voltage lockout feature, the output of the module cannot follow its own input voltage during power up. for more information, consult the related application note. margin down: when this input is asserted to gnd , the output voltage is de creased by 5% from the nominal. the input requires an open-collector (open-drain) interface. it is not ttl compatible. a lower percent change can be accomodated with a series resistor. for further infor- mation, consult the related application note. margin up: when this input is asserted to gnd , the output voltage is increased by 5%. the input requires an open-collector (open-drain) interface. it is not ttl compatible. the percent change can be reduced with a series resistor. for further information, consult the related application note. ordering information ath22t05 series ?5-v input 22-a, 5-v i nput non-isolated wide-output adjust power module revision 00 (3dec2003) input volt age output voltage output current model number 4.5v to 5.5v 0.8v 1 to 3.6v 22a ath22t05-9(s)(j) options: -j - through-hole termination, tray packaging -sj - smt termination, tray packaging -s - smt termination, t&r packaging notes: 1 preset output voltage is 0.8v; externally adjustable to 3.6v through the vo,adjust pin
north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 environmental & absolute maximum ratings (voltages are with respect to gnd) characteristics symbols conditions min typ max units track input voltage v track C0.3 v in + 0.3 v operating temperature range t a over v in range C40 85 c solder reflow temperature t reflow surface temperature of module body or pins 215 (i) c storage temperature t s C40 125 c mechanical shock per mil-std-883d, method 2002.3 500 gs 1 msec, ? sine, mounted mechanical vibration mil-std-883d, method 2007.2 20 gs 20-2000 hz weight 7 grams flammability meets ul 94v-o notes: (i) during reflow of smd package version do not elevate peak temperature of the module, pins or internal components above the st ated maximum. for further guidance refer to the application note, reflow soldering requirements for plug-in power surface mount products. specifications (unless otherwise stated, t a =25 c, v in =5 v, v out =3.3 v, c in =1,000 f, c out =0 f, and i o =i o max) pth05020w characteristics symbols conditions min typ max units output current i o 60 c, 200 lfm airflow 0 22 (1) a 25 c, natural convection 0 22 (1) input voltage range v in over i o range 4.5 5.5 v set-point voltage tolerance v o tol r set =698 ? 2 (2) %v o temperature variation ? reg temp C40 c north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 note a: characteristic data has been developed from actual products tested at 25c. this data is considered typical data for the conve rter. note b: soa curves represent the conditions at which internal components are at or below the manufacturers maximum operating tempera tures. derating limits apply to modules soldered directly to a 4 in. 4 in. double-sided pcb with 1 oz. copper. typical characteristics characteristic data; v in =5 v (see note a) efficiency vs load current power dissipation vs load current output ripple vs load current safe operating area; v in =5 v (see note b) output voltage =3.3 v ath22t05 series?5-v input 22-a, 5-v i nput non-isolated wide-output adjust power module 20 30 40 50 60 70 80 90 0 5 10 15 20 iout (a) ambient temperature (c) 400lfm 200lfm 100lfm nat conv airflow 50 60 70 80 90 100 0 4 8 121620 iout - amps efficiency - % 3.3 v 2.5 v 1.8 v 1.5 v 1.2 v 1 v v out 0 10 20 30 40 50 0 4 8 12 16 20 iout - amps vout - mv 2.5 v 1.8 v 3.3 v 1.5 v 1.2 v 1 v v out 0 1 2 3 4 5 6 0 4 8 12 16 20 iout - amps pd - watts
application notes north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 adjust ing the output voltage of the ath22t033 & ath22t05 wide-output adjust power modules the v o adjust control (pin 4) sets the output voltage of the ath22t033 and ath22t05 products. the ad- justment range of the ath22t033 (3.3-v input) is from 0.8 v to 2.5 v 1 , and the ath22t05 (5-v input) from 0.8 v to 3.6 v. the adjustment method r equires the addi- tion of a single external resistor, r set , that must be connected directly between the v o adjust and gnd pins 2 . table 1-1 gives the preferred value of the external resistor for a num- ber of standard voltages, along with the actual output voltage that this resistance value provides. for other output voltages the value of the required resistor can either be calculated using the following formula, or simply selected from the range of values given in table 1-2. figure 1-1 shows the placement of the required resistor. r set = 10 k ? 0.8 v C 2.49 k ? v out C 0.8 v figure 1-1; v o adjust resistor placement notes: 1. modules that operate from a 3.3-v input bus should not be adjusted higher than 2.5 v. 2. use a 0.1 w resistor. the tolerance should be 1 %, with temperature stability of 100 ppm/c (or better). place the resistor as close to the regulator as possible. connect the resistor directly between pins 4 and 7 using dedicated pcb traces. 3. never connect capacitors from v o adjust to either gnd or v out . any capacitance added to the v o adjust pin will affect the stability of the regulator. pth05020w 14 5 6 c out 330f + gnd v out v o sense [note 3] v o adj gnd v o sense v out r set 0.1 w, 1 % 10 9 8 7 gnd 0.800 open 0.825 318 k ? 0.850 158 k ? 0.875 104 k ? 0.900 77.5 k ? 0.925 61.5 k ? 0.950 50.8 k ? 0.975 43.2 k ? 1.000 37.5 k ? 1.025 33.1 k ? 1.050 29.5 k ? 1.075 26.6 k ? 1.100 24.2 k ? 1.125 22.1 k ? 1.150 20.4 k ? 1.175 18.8 k ? 1.200 17.5 k ? 1.225 16.3 k ? 1.250 15.3 k ? 1.275 14.4 k ? 1.300 13.5 k ? 1.325 12.7 k ? 1.350 12.1 k ? 1.375 11.4 k ? 1.400 10.8 k ? 1.425 10.3 k ? 1.450 9.82 k ? 1.475 9.36 k ? 1.50 8.94 k ? 1.55 8.18 k ? 1.60 7.51 k ? 1.65 6.92 k ? 1.70 6.4 k ? 1.75 5.93 k ? 1.80 5.51 k ? 1.85 5.13 k ? 1.90 4.78 k ? 1.95 4.47 k ? v out (standard) r set (pref?d value) v out (actual) 3.3 v 2 698 ? 3.309v 2.5 v 2.21 k ? 2.502 v 2 v 4.12 k ? 2.010 v 1.8 v 5.49 k ? 1.803 v 1.5 v 8.87 k ? 1.504 v 1.2 v 17.4 k ? 1.202 v 1 v 36.5 k ? 1.005 v 0.8 v open 0.8 v table 1-1; preferred values of r set for standard output voltages ath22t033 & ath22t05 series table 1-2; output voltage set-point resistor values v a req?d r set v a req?d r set 2.00 4.18 k ? 2.05 3.91 k ? 2.10 3.66 k ? 2.15 3.44 k ? 2.20 3.22 k ? 2.25 3.03 k ? 2.30 2.84 k ? 2.35 2.67 k ? 2.40 2.51 k ? 2.45 2.36 k ? 2.50 2.22 k ? 2.55 2.08 k ? 2.60 1.95 k ? 2.65 1.83 k ? 2.70 1.72 k ? 2.75 1.61 k ? 2.80 1.51 k ? 2.85 1.41 k ? 2.90 1.32 k ? 2.95 1.23 k ? 3.00 1.15 k ? 3.05 1.07 k ? 3.10 988 ? 3.15 914 ? 3.20 843 ? 3.25 775 ? 3.30 710 ? 3.35 647 ? 3.40 587 ? 3.45 529 ? 3.50 473 ? 3.55 419 ? 3.60 367 ? ath22t05-9s
application notes north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 table 2-1: input/output capacitors ath22t033/t05: capacitor recommendations input capacitor the recommended input capacitor(s) is determined by the 1,000 f (1) minimum capacitance and 700 marms minimum ripple current rating. ripple current and <100 m ? equivalent series resistance (esr) values are the major considerations, along with temperature, when designing with different types of capacitors. tantalum capacitors have a recommended minimum voltage rating of 2 (the maximum dc voltage + ac ripple). this is standard practice for tantalum capacitors to insure reliability. ceramic capacitors ceramic capacitors may be substituted for electrolytic types using the minimum capacitance, for improved ripple reduction on the input bus. output capacitors (optional) the recommended esr of the capacitors is equal to or less than 150 m ? . electrolytic capacitors have marginal ripple performance at frequencies greater than 400 khz but excellent low frequency transient response. above the ripple frequency, ceramic capacitors are necessary to improve the transient response and reduce any high frequency noise components apparent during higher current excursions. preferred low esr type capacitor part numbers are identified in table 2-1. t antalum capacitors tantalum type capacitors can be used for the output, but only the avx tps, sprague 593d/594/595or kemet t495/t510 series. these capacitors are recommended over many other tantalum types due to their higher rated surge, power dissipation, and ripple current capability. as a caution the taj series by avx is not recommended. this series has considerably higher esr, reduced power dissipation, and lower ripple curr ent capability. the taj series is less reliable than the avx tps series when determining power dissipation capability. tantalum, ceramic, or os-con types are recommended for applica- tions where ambient temperatures fall below 0 c. capacitor table table 2-1 identifies the characteristics of capacitors from a number of vendors with acceptable esr and ripple current (rms) ratings. the number of capacitors required at both the input and output buses is identified for each capacitor type. this is not an extensive capacitor list. capacitors from other vendors are available with comparable specifications. those listed are for guidance. the rms ripple current rating and esr (at 100khz) are critical parameters necessary to insure both optimum regulator performance and long capacitor life. / r o d n e v r o t i c a p a c s e i r e s s c i t s i r e t c a r a h c r o t i c a p a cy t i t n a u q g n i k r o w e g a t l o v ) f ( e u l a vt n e l a v i u q e ) r s e ( e c n a t s i s e r s e i r e s m u m i x a m c 5 0 1 e l p p i r ) s m r i ( t n e r r u c l a c i s y h p ) m m ( e z i s t u p n i s u b t u p t u o s u b r e b m u n t r a p r o d n e v c i n o s a n a p ) l a i d a r ( c f k f) . t m e c a f r u s ( v 0 1 v 0 1 v 5 2 v 0 1 0 6 5 0 0 0 1 0 0 0 1 0 0 0 1 0 9 0 . 0 ? 8 6 0 . 0 ? 0 6 0 0 ? 0 8 0 . 0 ? a m 5 5 7 a m 0 5 0 1 a m 0 0 1 1 a m 0 5 8 0 1 5 . 2 1 0 1 6 1 5 . 2 1 5 . 3 1 0 1 2 . 0 1 2 1 1 1 1 1 1 1 1 6 5 a 1 c f u e e 2 0 1 a 1 c f u e e q 2 0 1 e 1 k f v e e p 2 0 1 a 1 k f v e e n o c - i m e h c d e t i n u ) . t m e c a f r u s ( a x p x f s e i r e s z x l v 3 . 6 v 3 . 6 v 0 1 v 0 1 0 7 4 0 0 0 1 0 8 6 0 0 0 1 0 2 0 . 0 ? 3 1 0 . 0 ? 0 9 0 . 0 ? 8 6 0 . 0 ? a m 0 3 1 4 a m 5 3 9 4 a m 0 6 7 a m 0 5 0 1 0 1 7 . 7 0 1 5 . 0 1 0 1 5 . 2 1 0 1 6 1 ) 1 ( 2 1 2 1 1 1 1 1 p t 0 8 j m 1 7 4 c v 3 . 6 a x p m 0 0 0 1 x f 6 l l 2 1 x 0 1 m 1 8 6 b v 0 1 z x l l l 6 1 x 0 1 m 2 0 1 b v 0 1 z x l n o c i h c i n s e i r e s m p v 3 . 6 v 0 1 v 6 1 0 0 0 1 0 0 0 1 0 0 0 1 3 5 0 . 0 ? 5 6 0 . 0 ? 5 5 0 . 0 ? a m 0 3 0 1 a m 0 6 0 1 a m 0 0 4 4 5 . 2 1 x 0 1 6 1 5 1 0 1 0 1 1 1 1 1 1 1 r p m 2 0 1 j 0 d h u 6 h p m 2 0 1 a 1 m p u 6 h h m 2 0 1 c 1 m p u : n o c - s o - o y n a s p s ) . t m e c a f r u s ( p v s v 0 1 v 0 1 0 7 4 0 6 5 5 1 0 . 0 ? 3 1 0 . 0 ? a m 0 0 5 4 > a m 0 0 2 5 > 0 1 5 . 0 1 0 1 7 . 2 1 ) 1 ( 2 2 1 1 m 0 7 4 p s 0 1 m 0 6 5 p v s 0 1 m u l a t n a t x v a ) . t m e c a f r u s ( s p t v 0 1 v 0 1 0 7 4 0 7 4 5 4 0 . 0 ? 0 6 0 . 0 ? a m 3 2 7 1 a m 6 2 8 1 l 3 . 7 w 7 . 5 h 1 . 4 ) 1 ( 2 ) 1 ( 2 1 1 5 4 0 0 r 0 1 0 m 7 7 4 e s p t 0 6 0 0 r 0 1 0 m 7 7 4 v s p t r e m y l o p t e m e k m u l a t n a t s e i r e s 0 3 5 t / 0 2 5 t ) . t m e c a f r u s ( v 0 1 v 0 1 0 3 3 0 3 3 0 4 0 . 0 ? 5 1 0 . 0 ? a m 0 0 8 1 a m 0 0 8 3 > w 3 . 4 l 3 . 7 h 0 . 4 3 3 1 1 s a 0 1 0 m 7 3 3 x 0 2 5 t s a 0 1 0 m 7 3 3 x 0 3 5 t m u l a t n a t e u g a r p s s e i r e s d 5 9 5 ) . t m e c a f r u s ( v 0 10 7 40 0 1 . 0 ? a m 0 4 4 1l 2 . 7 w 6 h 1 . 4 ) 1 ( 21 t 2 r 0 1 0 0 x 7 7 4 d 5 9 5 ath22t033 & ath22t05 series (1) total capacitance of 940 f is acceptable based on the combined ripple current rating.
application notes ath series of wide-output adjust power modules (3.3/5-v input) north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 features of the ath family of non-isolated wide output adjust power modules point-of-load alliance the ath family of non-isolated, wide-output adjust power modules are optimized for applications that require a flexible, high performance module that is small in size. these products are part of the point-of-load alliance (pola), which ensures compatible footprint, interoperability and true second sourcing for cust omer design flexibility. the pola is a collaboration between texas instruments, artesyn technologies, and astec power to offer customers advanced non-isolated modules that provide the same functionality and form factor. prod- uct series covered by the alliance includes the ath06 (6 a), ath10 (10 a), a th12/15 (12/15 a), ath18/22 (18/22 a), and the ath26/30 (26/30 a). from the basic, just plug it in functionality of the 6-a modules, to the 30-a rated feature-rich ath30 series, these products were designed to be very flexible, yet simple to use. the features vary with each product. table 3-1 provides a quick reference to the available features by product and input bus voltage. table 3-1; operating features by series and input bus voltage for simple point-of-use applications, the ath06 (6a) provides operating features such as an on/off inhibit, output voltage trim, pre-bias startup (3.3/5-v input only), and over-current protection. the ath10 (10 a), and ath12/15 (12/15 a) include an output voltage sense, and margin up/down controls. then the higher output current, ath18/22 (18/22a) and ath26/30 (26/30a) products incor- porate over-temperature shutdown protection. all of the products referenced in table 3-1 include auto-t rack?. power-up characteristics when configured per their standard application all the ath products will produce a regulated output voltage fol- lowing the application of a valid input source voltage. all the modules include soft-start circuitry. this slows the initial rate in which the output voltage can rise, thereby limiting the amount of in-rush current that can be drawn from the input source. the soft-start circuitry also intro duces a short time delay (typically 5 ms-10 ms) into the power-up characteristic. this delay is from the point that a valid input source is recognized, to the initial rise of the output voltage. figure 3-1 shows the power-up characteristic of the 22-a output product (ath22t05-9xx), operating from a 5-v input bus and configured for a 3.3-v output. the wave- forms were measured with a 5-a resistive load. the initial rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors. figure 3-1 vo (2v/div) iin (2a/div) vin (5v/div) horiz scale: 10ms/div over-current protection for protection against load faults, all modules incorporate output over-current protection. applying a load that exceeds the regulators over-current threshold will cause the regulated output to shut down. following shutdown a module will periodically attempt to recover by initiating a soft-start power-up. this is described as a hiccup mode of operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is removed. during this period, the average current flowing into the fault is significantly reduced. once the fault is removed, the module automatically recovers and returns to normal operation. series input bus i out 3.3 v 6 a ? 5 v 6 a 12 v 6 a 3.3 v / 5 v 10 a 12 v 8 a 3.3 v / 5 v 15 a 12 v 12 a 3.3 v / 5 v 22 a 12 v 18 a 3.3 v / 5 v 30 a 12 v 26 a pthxx030 on/off inhibit pthxx010 pthxx020 pthxx050 pthxx060 over-current output sense adjust (trim) thermal shutdown pre-bias startup margin up/down auto-track? this is a feature unique to the ath family, and was specifically designed to simplify the task of sequencing the supply voltage in a power system. these and other features are described in the following sections. ath10 ath06 ath12/15 ath18/22 ath26/30 10 a
application notes ath series of wide-output adjust power modules (3.3/5-v input) north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 output on/off inhibit for applications requiring output voltage on/off control, each series of the ath family incorporates an output inhibit control pin. the inhibit feature can be used wher- ever there is a requirement for the output voltage from the regulator to be turned off. the power modules function normally when the inhibit pin is left open-circuit, providing a regulated output whenever a valid source voltage is connected to v in with respect to gnd . figure 3-2 shows the typical application of the inhibit function. note the discrete transistor (q 1 ). the inhibit control has its own internal pull-up to v in potential. the input is not compatible with ttl logic devices. an open- collector (or open-drain) discrete transistor is recommended for control. turning q 1 on applies a low voltage to the inhibit control pin and disables the output of the module. if q 1 is then turned off, the module will execute a soft-start power-up sequence. a regulated output voltage is produced within 20 msec. figure 3-3 shows the typical rise in both the output voltage and input current, following the turn-off of q 1 . the turn off of q 1 corresponds to the rise in the waveform, q 1 v ds . the waveforms were measured with a 5-a load. figure 3-2 figure 3-3 vo (2v/div) iin (2a/div) q1vds (5v/div) horiz scale: 10ms/div pth05020w v in 1 10 4 5 6 2 3 l o a d c in 1,000 f + c out 330 f + 1 =inhibit gnd gnd v out 9 v o sense 8 q 1 bss138 r set 7 remote sense the ath10, ath12/15, ath18/22, and ath26/30 products incorporate an output voltage sense pin, v o sense . the v o sense pin should be connected to v out at the load circuit (see data sheet standard application). a re- mote sense improves the load regulation performance of the module by allowing it to compensate for any ir voltage drop between itself and the load. an ir drop is caused by the high output current flowing through the small amount of pin and trace resistance. use of the remote sense is optional. if not used, the v o sense pin can be left open-circuit. an internal low-value resistor (15- ? or less) is connected between the v o sense and v out . this en- sures the output voltage remains in regulation. with the sense pin connected, the difference between the voltage measured directly between the v out and gnd pins, and that measured from v o sense to gnd , is the amount of ir drop being compensated by the regulator. this should be limited to a maximum of 0.3 v. note: the remote sense feature is not designed to compensate for the forward drop of non-linear or frequency dependent components that may be placed in series with the converter output. examples include or-ing diodes, filter inductors, ferrite beads, and fuses. when these components are enclosed by the remote sense connection they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. over-temperature protection the ath18/22 and ath26/30 series of products have over-temperature pr otection. these products have an on-board temperature sensor that protects the modules internal circuitry against excessively high temperatures. a rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. if the internal temperature exceeds the otp threshold, the modules inhibit control is automatically pulled low. this turns the output off. the output voltage will drop as the external output capacitors are discharged by the load circuit. the recovery is automatic, and begins with a soft-start power up. it occurs when the the sensed tem- perature decreases by about 10 c below the trip point. note: the over-temperature protection is a last resort mecha- nism to prevent thermal stress to the regulator. operation at or close to the thermal shutdown temperature is not r ecom- mended and will reduce the long-term reliability of the module. always operate the regulator within the specified safe operating area (soa) limits for the worst-case conditions of ambient temperature and airflow. ath15t05-9s
application notes ath series of wide-output adjust power modules (3.3/5-v input) north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 auto-track? function the auto-track? function is unique to the ath family, and is available with the all point-of-load alliance (pola) products. auto-track? was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. the sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal applications, that use dual-voltage vlsi ics such as dsps, micro-processors, and asics. how auto-t rack? w orks auto-track? works by forcing the modules output voltage to follow a voltage presented at the track control pin. this control range is limited to between 0 v and the modules set-point voltage. once the track-pin voltage is raised above the set-point voltage, the modules output remains at its set-point 1 . as an example, if the track pin of a 2.5-v regulator is at 1 v, the regulated output will be 1 v. but if the voltage at the track pin rises to 3 v, the regulated output will not go higher than 2.5 v. when under track control, the regulated output from the module follows the voltage at its track pin on a volt- for-volt basis. by connecting the track pin of a number of these modules together, the output volt ages will fol- low a common signal during power-up and power-down. the control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit 3 . the track control also incorporates an internal rc charge circuit. this operates off the modules input voltage to produce a suitable rising waveform at power up. t ypical application the basic implementation of auto-track? allows for simultaneous voltage sequencing of a number of auto- track? compliant modules. connecting the track control pins of two or more modules forces the track control of all modules to follow the same collective rc ramp wave- form, and allows them to be controlled through a single transistor or switch; q 1 in figure 3-4. to initiate a power-up sequence, it is recommended that the track control be first pulled to ground potential. this should be done at or before input power is applied to the modules, and then held for at least 10 ms thereaf- ter. this brief period gives the modules time to complete their internal soft-start initialization. applying a logic- level high signal to the circuits on/off control turns q 1 on and applies a ground signal to the track pins. after completing their internal soft-start intialization, the out- put of all modules will remain at zero volts while q 1 is on. 10 ms after a valid input voltage has been applied to the modules, q 1 may be turned off. this allows the track con- trol voltage to automatically rise toward to the modules' input voltage. during this period the output voltage of each module will rise in un ison with other modules, to its respective set-point voltage. figure 3-5 shows the output voltage waveforms from the circuit of figure 3-4 after the on/off control is set from a high to a low-level voltage. the waveforms, vo 1 and vo 2 represent the output voltages from the two power mod- ules, u 1 (3.3 v) and u 2 (2.0 v) respectively. vo 1 and vo 2 are shown rising together to produce the desired simul- taneous power-up characteristic. the same circuit also provides a power-down sequence. power down is the reverse of power up, and is accom- plished by lowering the track control voltage back to zero volts. the important constraint is that a valid input voltage must be maintained until the power down is complete. it also requires that q 1 be turned off relatively slowly. this is so that the track control voltage does not fall faster than auto-track's slew rate capability, which is 5 v/ms. the components r 1 and c 1 in figure 3-4 limit the rate at which q 1 can pull down the track control voltage. the values of 100 k-ohm and 0.047 f correlate to a decay rate of about 0.6 v/ms. the power-down sequence is initiated with a low-to-high transition at the on/off control input to the circuit. figure 3-6 shows the power-down waveforms. as the track control voltage falls below the nominal set-point voltage of each power module, then its output voltage decays with all the other modules under auto-track? control. notes on use of auto-t rack? 1. the track pin voltage must be allowed to rise above the modules set-point voltage before the module can regulate at its adjusted set-point voltage. 2. the auto-track? function will track almost any voltage ramp during power up, and is compatible with ramp speeds of up to 5 v/ms. 3. the absolute maximum voltage that may be applied to the track pin is v in . 4. the module will not follow a voltage at its track control input until it has completed its soft-start initialization. this takes about 10 ms from the time that the module has sensed that a valid voltage has been applied its input. during this period, it is recommended that the track pin be held at ground potential. 5. once its soft-start initialization is complete, the module is capable of both sinking and sourcing current when following the voltage at the track pin. 6. the auto-track? function can be disabled by connecting the track pin to the input voltage ( v in ) through a 1-k ? resistor. when auto-track? is disabled, the output voltage will rise faster following the application of input power. **auto-track is a trademark of texas instruments, inc.
application notes ath series of wide-output adjust power modules (3.3/5-v input) north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 figure 3-5; simultaneous power up with auto-track control pth05010w 1 10 4 5 6 2 3 98 track v in v o gnd inhibit pth05020w 1 10 4 5 6 2 3 98 track v in v o gnd inhibit 7 c out + c out + c in + c in + vo 2 =2v vo 1 =3.3v u1 u2 +5v 0v on/off control 1 = power down 0 = power up q1 bss138 c1 0.047f r1 100k r 2 698 r 3 4k12 7 figure 3-4; sequenced power up & power down using auto-track figure 3-6; simultaneous power down with auto-track control vo1 (1v/div) vo2 (1v/div) on/off input (5v/div) horiz scale: 5ms/div vo1 (1v/div) vo2 (1v/div) on/off control (5v/div) horiz scale: 5ms/div ath22t05-9sj ath15t05-9sj
application notes ath series of wide-output adjust power modules (3.3/5-v input) north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 margin up/down controls the ath10 (10a), ath12/15 (12/15a), ath18/22 (18/ 22a) and a th26/30 (26/30a) products incorporate margin up and margin down control inputs. these controls allow the output voltage to be momentarily adjusted 1 , either up or down, by a nominal 5 %. this provides a convenient method for dynamically testing the operation of the load circuit over its supply margin or range. it can also be used to verify the function of supply voltage supervisors. the 5 % change is applied to the adju sted output voltage, as set by the external resistor, r set at the v o adjust pin. the 5 % adjustment is made by pulling the appropriate margin control input directly to the gnd terminal 2 . a low-leakage open-drain device, such as an n-channel mosfet or p-channel jfet is recommended for this purpose 3 . adjustments of less than 5 % can also be accom- modated by adding series resistors to the control inputs (see figure 3-4). the value of the resistor can be selected from table 3-2, or calculated using the following formula. up/down adjust resistance calculation to reduce the margin adjustment to something less than 5 %, series resistors are required (see r d and r u in figure 3-7). for the same amount of adjustment, the resistor value calculated for r u and r d will be the same. the formulas is as follows. r u or r d = 499 C 99.8 k ? ? % where ? % = the desired amount of margin adjust in percent. notes: 1. the margin up* and margin dn* controls were not intended to be activated simultaneously. if they are their affects on the output voltage may not completely cancel, resulting in the possibility of a slightly higher error in the output voltage set point. 2. the ground reference should be a direct connection to the module gnd at pin 7 (pin 1 for the ath06). this will produce a more accurate adjustment at the load circuit terminals. the transistors q 1 and q 2 should be located close to the regulator. 3. the margin up and margin dn control inputs are not compatible with devices that source voltage. this includes ttl logic. these are analog inputs and should only be controlled with a true open-drain device (preferably a discrete mosfet transistor). the device selected should have low off-state leakage current. each input sources 8 a when grounded, and has an open-circuit voltage of 0.8 v. figure 3-7; margin up/down application schematic table 3-2; margin up/down resistor values % adjust r u / r d 5 0.0 k ? 4 24.9 k ? 3 66.5 k ? 2 150.0 k ? 1 397.0 k ? c out + c in v in gnd margdn l o a d q 2 +v out q 1 + margup 0v +v o r d r u pth05010w (top view) 1 2 10 9 8 7 6 5 4 3 gnd r set 0.1 w, 1 % ath15t05-9s
application notes ath series of wide-output adjust power modules (3.3/5-v input) north america (usa): 1-888-41-astec europe (uk): 44(1384)842-211 asia (hk): 852 -2437-9662 pre-bias startup c apability only selected products in the ath family incorporate this capability. consult table 3-1 to identify which products are compliant. a pre-bias startup condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. this often occurs in com- plex digital systems when current from another power source is backfed through a dual-supply logic component, such as an fpga or asic. another path might be via clamp diodes as part of a dual-supply power-up sequencing arrangement. a prebias can cause problems with power modules that incorporate synchronous rectifiers. this is because under most operating conditions, these types of modules can sink as well as source output current. the ath family of power modules incorporate synchro- nous rectifiers, but will not sink current during startup 1 , or whenever the inhibit pin is held low. however, to ensure satisfactory operation of this function, certain conditions must be maintained. 2 figure 3-7 shows an application demonstrating the pre-bias startup capability. the start- up waveforms are shown in figure 3-9. note that the output current from the ath15t033-9xx (i o ) shows neg- ligible current until its output voltage rises above that backfed through diodes d 1 and d 2 . note: the pre-bias start-up feature is not compatible with auto-track. when the module is under auto-track control, it is fully active and will sink current if the output voltage is below that of a back-feeding source. therefore to ensure a pre- bias hold-off, one of two approaches must be followed when input power is applied to the module. the auto-track function must either be disabled 3 , or the modules output held off using the inhibit pin. the latter allows auto-tracks internal (rc) voltage ramp to rise above the set-point voltage. notes 1. startup is the relatively short period (approx. 10 ms) prior to the output v oltage rising. the startup period immediately follows either the application of a valid input source v oltage, or the release of a ground signal at the inhibit pin. 2. to ensure that the regulator does not sink current when power is first applied (even with a ground signal applied to the inhibit control pin), the input voltage must always be greater than the output voltage throughout the power-up and power-down sequence. 3. the auto-track function can be disabled at power up by immediately applying a voltage to the modules track pin that is greater than its set-point voltage. this can be easily accomplished by connecting the track pin to v in through a 1-k ? resistor. v o = 2.5 v v in = 3.3 v r 2 2k21 r 1 1k0 asic vcore vccio i o pth03010w 1 10 4 5 6 2 3 98 track v in v o gnd inhibit 7 vadj sense + c in 330 f + d 1 , d 2 mbr3100 c out 330 f + figure 3.8; application circuit demonstrating pre-bias startup vin (1 v/div) vo (1 v/div) io (5 a/div) horiz scale: 5 ms/div figure 3.9; pre-bias startup waveforms ath15t033-9s

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